A recording apparatus which records information such as a desired character or image on a sheet-like recording medium such as paper or a film is known as an information output apparatus for a wordprocessor, personal computer, facsimile apparatus, and the like. Because of low costs and easy downsizing, such recording apparatuses generally widely employ a serial recording method of recording information during reciprocal scanning in a direction perpendicular to the feed direction of a recording medium such as paper.
The structure of a recording head used in the recording apparatus will be explained by exemplifying a recording head complying with an inkjet recording method of recording information using thermal energy. In the inkjet recording head, a heat element (heater) is arranged as a recording element at a portion communicating with a discharge aperture (nozzle) for discharging ink droplets. A current is supplied to the heat element to generate heat, bubble ink, discharge ink droplets, and thereby record information. This recording head makes it easy to arrange many discharge apertures and heat elements. (heaters) at high densities, and can obtain a high-resolution recorded image.
The heat elements (heater) of the recording head and their drive circuit according to a conventional inkjet recording method are formed on the same element body using a semiconductor process technique (patent reference 1).
FIG. 1 shows an example of the circuit block layout of an element body 100 for a recording-head on which heaters and their drive circuits are integrally formed. FIG. 4 is a block diagram schematically showing circuits arranged on one side of an ink supply aperture on the element body. The same reference numerals as those in FIG. 1 denote the same parts.
An elongated ink supply aperture 101 is formed at almost the center of the element body 100, along the long side (longitudinal direction in FIG. 1) of the element body. Heater arrays 102, driver transistors 103 for driving heaters, booster circuits 105, high-voltage logic circuits 104, and data lines and decoder lines Ill are symmetrically arranged in the order named outward from the center on the two sides of the ink supply aperture 101. Pads 109 for externally supplying power and electrical signals are arranged at two, upper and lower ends of the element body 100 along the short side of the element body. A circuit including a shift register 106 and latch 108 is arranged on the inner side of each pad 109. A decoder 107 is arranged on one side on the inner side of the shift register and latch circuits 106 and 108. A voltage converter circuit 110 for supplying power to the booster circuit 105 is arranged widely along the short side of the element body between the decoder 107 and a portion at which elements up to the logic circuits 104 are arranged from the ink supply aperture 101.
In the layout shown in FIG. 1, the pad 109 corresponding to the heater array 102, driver transistor 103, booster circuit 105, and logic circuit 104 on the right side of the ink supply aperture 101 is arranged on the upper side. The shift register 106, latch 108, decoder 107, and voltage converter circuit 110 corresponding to the above-mentioned elements on the right side of the ink supply aperture 101 are also arranged on the upper side. The pad 109 corresponding to the heater array 102, driver transistor 103, booster circuit 105, and logic circuit 104 on the left side of the ink supply aperture 101 is arranged on the lower side. The shift register 106, latch 108, decoder 107, and voltage converter circuit 110 corresponding to the above-mentioned elements on the left side of the ink supply aperture 101 are also arranged on the lower side.
The heater array 102 in the prior art is divided into M groups, as shown in FIG. 4. Each signal is input to the circuit of FIG. 4 at a timing as shown in FIG. 3. A data signal DATA synchronized with a clock signal CLK is serially input to the shift register in the order of M-bit data which designates a group and X-bit data which designates a heater in the group. When a data signal DATA of predetermined bits is input, the data is held at a timing when a latch signal LT changes to low level. The latter X-bit data of the data signal DATA input to the shift register is decoded into N-bit (X<N) data by the decoder 107. This circuit configuration using the decoder can compress the data amount, reduce the transfer data amount, and drive heaters at a higher speed.
The M-bit and N-bit signals select a driver transistor 103 which is controlled by M×N matrix driving of the logic circuit 104. The logic circuit 104 outputs a signal which drives the selected driver transistor 103 by a specific time (pulse width) in a period during which a heat signal HE is kept low. However, the output voltage of the logic circuit 104 cannot control the driver transistor 103. Thus, the output voltage is boosted to a predetermined voltage by the booster circuit 105 to drive the driver transistor 103 and thereby energize and drive the heater array 102. N driver transistors 103 and N heaters in the heater array 102 of one group are driven by time division. The numbers of simultaneously driven driver transistors 103 and heaters in the heater array 102 are one per group and M at maximum in all the groups. That is, all heaters can be driven by selecting M driver transistors 103 and M heaters in the heater array 102 N times by time division.
In the prior art, powers externally input from the pad 109 are a power source voltage VDD (about 3 V) for driving a logic circuit, and VSS which is the corresponding ground voltage GND. Powers also include a heater voltage VH (about 24 V) for driving a heater, GNDH which is corresponding ground voltage GND, and power VHT having the same voltage value as the heater voltage VH. The power VHT is input to the voltage converter circuit 110, and converted into a converted voltage VHTM used as power for the driver transistor 103, high-voltage logic circuit 104, and booster circuit 105. The voltage value of the converted voltage VHTM is large enough to drive the driver transistor 103, and is larger than the power source voltage VDD and smaller than the breakdown voltages of elements which form the driver transistor 103 and booster circuit 105. In the prior art, the voltage value of the converted voltage VHTM is about 14 V. By arranging the voltage converter circuit 110, the number of power source wirings for externally supplying power can be minimized to reduce costs.
FIG. 2 shows the circuit configuration of the voltage converter circuit 110 in the prior art. As shown in FIG. 2, the voltage converter circuit 110 has a source-follower configuration. A predetermined reference voltage is applied to the gate of a MOSFET 201 to define the voltage value of the converted voltage (VHTM). If a predetermined voltage is always applied to the gate of the MOSFET 201, fluctuations in converted voltage are suppressed even upon a change in current value flowing through the drain-source path of the MOSFET 201. In order to always keep the converted voltage constant, a predetermined voltage must always be applied to the gate of the MOSFET 201.
For this purpose, a reference voltage generating section 202 in this example generates a predetermined reference voltage by dividing resistors. A desirable example of the resistive element is an element (e.g., a poly-Si (polysilicon) element) which hardly varies in resistance value upon variations in heat and applied voltage. To the contrary, a source load resistance 203 less influences voltage fluctuations of the converted voltage VHTM than the reference voltage generating section 202, so an element (e.g., a diffusion resistance) of a small layout area is desirably used.    [Patent Reference 1] Japanese Patent Laid-Open No. 5-185594
As described above, the converted voltage VHTM is applied to the driver transistor 103, logic circuit 104, and booster circuit 105. The converted voltage VHTM has a voltage value which is generated (converted) in the voltage converter circuit 110. The converted voltage VHTM is more unstable and more readily fluctuates than externally supplied power such as the heater voltage VH or power source voltage VDD.
If the converted voltage VHTM becomes unstable, for example, if the converted voltage VHTM greatly drops, the driver transistor 103 cannot be driven. Further, the logic circuit 104 and booster circuit 105 may not be driven or malfunction.
As is apparent from the element body layout shown in FIG. 1, the voltage converter circuit 110 which applies the converted voltage VHTM is arranged on one side of a corresponding driver transistor 103, logic circuit 104, and booster circuit 105. A voltage applied to a circuit spaced apart from the voltage converter circuit 110 is more prone to drop or become unstable under the influence of the wiring resistance or the like, than a voltage applied to a circuit near the voltage converter circuit 110.
Along with recent increases in the speed of inkjet recording apparatuses, the element body of the recording head tends to be longer in order to increase the number of nozzles. The longer element body requires longer wiring for the converted voltage VHTM, and the above-described problems worsen. Since the number of simultaneously driven elements increases for higher speeds, the converted voltage VHTM must be more stable.
In order to stabilize the converted voltage VHTM, the voltage converter circuit 110 is effectively enlarged. More specifically, the MOSFET 201 is generally enlarged to supply a larger current. This, however, increases the element body area and cost.